The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7498865 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 03, 2009

Filed:

Feb. 19, 2004
Applicants:

Shiro Sakiyama, Yawata, JP;

Masayoshi Kinoshita, Settsu, JP;

Masaya Sumita, Amagasaki, JP;

Inventors:

Shiro Sakiyama, Yawata, JP;

Masayoshi Kinoshita, Settsu, JP;

Masaya Sumita, Amagasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a semiconductor integrated circuit of the present invention, the main circuitincludes MOS transistors in which the source and the substrate are separated from each other. The substrate potential control circuitcontrols the substrate potential of the MOS transistors of the main circuitso that the actual saturation current value of the MOS transistors of the main circuitis equal to the target saturation current value Ids under the operating power supply voltage Vdd of the main circuit. Therefore, it is possible to suppress variations in the operation speed even if the operating power supply voltage of the semiconductor integrated circuit is reduced.


Find Patent Forward Citations

Sakiyama, Shiro. (2009). Semiconductor integrated circuit with reduced speed variations (U.S. Patent No. 7498865). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7498865

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