The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2009

Filed:

Mar. 27, 2007
Applicants:

Dipankar Bhattacharya, Macungie, PA (US);

Carol A. Huber, Macungie, PA (US);

Makeshwar Kothandaraman, Whitehall, PA (US);

John C. Kriz, Palmerton, PA (US);

Bernard L. Morris, Emmaus, PA (US);

Inventors:

Dipankar Bhattacharya, Macungie, PA (US);

Carol A. Huber, Macungie, PA (US);

Makeshwar Kothandaraman, Whitehall, PA (US);

John C. Kriz, Palmerton, PA (US);

Bernard L. Morris, Emmaus, PA (US);

Assignee:

Agere Systems Inc., Allentown, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A buffer circuit is selectively operative in one of at least a first mode and a second mode as a function of a first control signal supplied to the buffer circuit. The buffer circuit includes interface circuitry operative to receive at least second and third control signals referenced to a first voltage level, and to generate an output signal referenced to a second voltage level, the second voltage level being greater than the first voltage level. The output signal is a function of the second control signal in the first mode and is a function of the third control signal in the second mode. The buffer circuit further includes at least first and second circuit portions coupled to the interface circuitry, each of the first and second circuit portions including at least one control input operative to receive the output signal generated by the interface circuitry.


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