The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2009
Filed:
Aug. 01, 2005
Hiroyuki Kitajima, Shiga, JP;
Hiroyuki Kitajima, Shiga, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
A power-ON-clear circuit has a reset period when the power supply stops temporarily (or instantaneously) and then that power supply is restored. The power-ON-clear circuitof a semiconductor integrated circuitcomprises: a capacitor Cof which one end is connected to the external power-supply voltage Vcc; an N-channel MOS transistor Qof which the drain is connected to the other end of the capacitor C, the source is connected to the ground potential, and the gate is connected to the external power-supply voltage by way of a resistor R; and an inverter INVthat is connected to the connecting point between the capacitor Cand MOS transistor Qin a stage connection, and is connected to the power supply between the internal power-supply voltage Vccand the ground potential.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile