The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2009

Filed:

Jun. 27, 2006
Applicants:

Takeshi Kawabata, Osaka, JP;

Fumito Itou, Osaka, JP;

Inventors:

Takeshi Kawabata, Osaka, JP;

Fumito Itou, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A lower module of a stacked semiconductor device includes a first substrate and a first semiconductor chip held above the first substrate. The top surface of the first substrate is provided with a plurality of first chip connection terminals electrically connected to the first chip terminals, respectively, and a plurality of upper module connection terminals electrically connectable to an upper module provided with a second semiconductor chip. The back surface of the first substrate is provided with a plurality of external substrate connection terminals. Each of the first chip connection terminals is electrically connected to a corresponding one of the external substrate connection terminals, and each of the upper module connection terminals is electrically connected between a corresponding one of the chip connection terminals and a corresponding one of the external substrate connection terminals.


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