The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2009

Filed:

Jul. 28, 2005
Applicants:

William T. Boyd, Poughkeepsie, NY (US);

Douglas M. Freimuth, New York, NY (US);

William G. Holland, Cary, NC (US);

Steven W. Hunter, Raleigh, NC (US);

Renato J. Recio, Austin, TX (US);

Steven M. Thurber, Austin, TX (US);

Madeline Vega, Austin, TX (US);

Inventors:

William T. Boyd, Poughkeepsie, NY (US);

Douglas M. Freimuth, New York, NY (US);

William G. Holland, Cary, NC (US);

Steven W. Hunter, Raleigh, NC (US);

Renato J. Recio, Austin, TX (US);

Steven M. Thurber, Austin, TX (US);

Madeline Vega, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04J 1/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method, mechanism and computer usable medium is provided for distributing I/O fabric errors to the appropriate root nodes in a multi-root environment. The case where the I/O fabric is attached to more than one root node and where each root can potentially share with the other roots the I/O adapter (IOA) resources which are attached to the I/O is addressed. Additionally, a method, mechanism and computer usable medium is provided by which errors detected in an I/O fabric may be routed to all root nodes which may be affected by the error, while not being reported to the root nodes that will not be affected by those errors. In particular, distributed computing system which uses the PCI Express protocol to communicate over the I/O fabric is addressed.


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