The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2009

Filed:

Mar. 30, 2005
Applicants:

Julian William Gardner, Warwickshire, GB;

James Anthony Covington, West Midlands, GB;

Florin Udrea, Cambridge, GB;

Inventors:

Julian William Gardner, Warwickshire, GB;

James Anthony Covington, West Midlands, GB;

Florin Udrea, Cambridge, GB;

Assignee:

University of Warwick, Warwickshire, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
Abstract

A gas-sensing semiconductor device is fabricated on a silicon substrate having a thin silicon oxide insulating layer in which a resistive heater made of a CMOS compatible high temperature metal is embedded. The high temperature metal is tungsten. The device includes at least one sensing area provided with a gas-sensitive layer separated from the heater by an insulating layer. As one of the final fabrication steps, the substrate is back-etched so as to form a thin membrane in the sensing area. Except for the back-etch and the gas-sensitive layer formation, that are carried out post-CMOS, all other layers, including the tungsten resistive heater, are made using a CMOS process employing tungsten metallisation. The device can be monolithically integrated with the drive, control and transducing circuitry using low cost CMOS processing. The heater, the insulating layer and other layers are made within the CMOS sequence and they do not require extra masks or processing.


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