The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2009

Filed:

Oct. 14, 2005
Applicants:

Daniel Mccarthy, Eagan, MN (US);

Lakshman Withanawasam, Maple Grove, MN (US);

Inventors:

Daniel McCarthy, Eagan, MN (US);

Lakshman Withanawasam, Maple Grove, MN (US);

Assignee:

Honeywell International Inc., Morristown, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a vertically mountable integrated circuit (IC) package is presented. An integrated circuit is mounted on a printed circuit board (PCB) and electrically coupled to a bond pad on the PCB. The bond pad is coupled with a via that is embedded in the PCB. The IC, the bond pad, the via, and a portion of the PCB are singulated in order to create a vertically mountable IC package. The via is cut through cross-sectionally during singulation so as to expose a portion of the via and thereby provide a mountable area for the IC package. The IC package may be encapsulated or housed in a dielectric material. In addition, the via may be treated with a preservative or other s-uitable electroless metal plating deposition that prevents oxidation and promotes solderability.


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