The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2009
Filed:
Jul. 13, 2006
Elias Ahmed, Ottawa, CA;
Ketan Padalia, Thornhill, CA;
Elias Ahmed, Ottawa, CA;
Ketan Padalia, Thornhill, CA;
Altera Corporation, San Jose, CA (US);
Abstract
A method for technology mapping user logical RAM on a programmable logic device is provided. The method preferably includes clustering non-RAM functional block types in the programmable logic device. Following synthesis of a user design, the method then includes determining the number of physical RAM locations available on the selected device. Also, the method includes determining the number of physical RAM locations available in the PLD and the number of Look-Up-Table (LUT) RAM locations available in the PLD. Finally, the method includes determining a combination of physical RAM locations and LUT RAM locations for implementation of the user logical RAM. The combination preferably represents a beneficial combination of physical RAM and LUT RAM with respect to a predetermined metric.