The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2009

Filed:

Mar. 18, 2005
Applicants:

Roger B. Milne, Boulder, CO (US);

Alexander R. Vogenthaler, Boulder, CO (US);

Jeffrey D. Stroomer, Lafayette, CO (US);

Bradley L. Taylor, Santa Cruz, CA (US);

Alexander Carreira, Longmont, CO (US);

Inventors:

Roger B. Milne, Boulder, CO (US);

Alexander R. Vogenthaler, Boulder, CO (US);

Jeffrey D. Stroomer, Lafayette, CO (US);

Bradley L. Taylor, Santa Cruz, CA (US);

Alexander Carreira, Longmont, CO (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods are provided for processing design information of an electronic circuit design. A single path or multiple paths that are produced by a first design tool are an input for the method. Each path includes an ordered set of element names of the electronic circuit design. Each element name of each path is pattern matched with the names of design blocks of the electronic circuit design produced by a second design tool. Data indicative of a path produced by the second design tool that includes the design blocks that are pattern matched to the ordered set of element names is the output of the method.


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