The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 2009
Filed:
Dec. 14, 2005
Applicant:
Sanjay K. Charagulla, San Jose, CA (US);
Inventor:
Sanjay K. Charagulla, San Jose, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A system and method for memory control. The system includes a hard-IP memory controller, a soft-IP frequency conversion system, and an interface system. The soft-IP frequency conversion system is coupled to the hard-IP memory controller, and is capable of being programmed to convert data signals between a first frequency and a second frequency.
Charagulla, Sanjay. (2009). Fully buffered dimm system and method with hard-ip memory controller and soft-ip frequency controller (U.S. Patent No. 7490209). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7490209
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile