The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2009
Filed:
Jul. 03, 2003
Harish R. Devanagondi, Saratoga, CA (US);
Harish P. Belur, Saratoga, CA (US);
Brian A. Petersen, San Francisco, CA (US);
Richard J. Heaton, San Jose, CA (US);
Majid Torabi, Los Altos Hills, CA (US);
Harish R. Devanagondi, Saratoga, CA (US);
Harish P. Belur, Saratoga, CA (US);
Brian A. Petersen, San Francisco, CA (US);
Richard J. Heaton, San Jose, CA (US);
Majid Torabi, Los Altos Hills, CA (US);
Abstract
A multi-slice network processor processes a packet in packet slices for transfer over a multi-port network interface such as a switch fabric. The network processor segments a packet into cells having a target size. A group of cells of a common packet form a packet slice which is independently processed by one of a number of parallel processing and storage slices. Load balancing may be used in the selection of processing slices. Furthermore, the network processor may load balance slices across the multi-port network interface to one or more destination slices of another network processor. The multi-slice processor uses post header storage delivery on ingress processing to the multi-port interface thereby reducing temporary storage requirements. The multi-slice network processor may also utilize sequence numbers associated with each packet to ensure that prior to transmission onto a destination network, the packet is in the correct order for a communication flow.