The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2009

Filed:

Jul. 11, 2006
Applicant:

Kwan-yeob Chae, Seoul, KR;

Inventor:

Kwan-Yeob Chae, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

Delay line circuits include a plurality of delay cells connected in series. The delay cells respectively include a first to a third logic gate. The first logic gate, in response to a selection signal, generates a first signal based on an input signal. The second logic gate generates a second signal based on the input signal in response to the selection signal. The third logic gate generates a third signal based on either a return signal or an output signal of the second logic gate.


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