The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2009
Filed:
May. 20, 2008
Pradip Bose, Yorktown Heights, NY (US);
Jeonghee Shin, Los Angeles, CA (US);
Victor Zyuban, Yorktown Heights, NY (US);
Pradip Bose, Yorktown Heights, NY (US);
Jeonghee Shin, Los Angeles, CA (US);
Victor Zyuban, Yorktown Heights, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for extending lifetime reliability of CMOS circuitry includes configuring a logic high supply rail, a logic low supply rail, and a virtual supply rail. In an intense recovery mode of operation, a first switching device is rendered nonconductive to isolate the virtual supply rail from the one of the logic high supply rail and the logic low supply rail, and the second switching device is rendered conductive so as to equalize the voltage on the virtual supply rail and the other of the logic high supply rail and the logic low supply rail. At least one device within the circuitry provides one of the logic high voltage and the logic low voltage to a gate terminal of an FET within the circuitry, with a source terminal of the FET coupled to the virtual supply rail, such that the FET is subjected to a reverse bias condition.