The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2009

Filed:

Dec. 05, 2006
Applicant:

Rafael Czernek Camarota, Sunnyvale, CA (US);

Inventor:

Rafael Czernek Camarota, Sunnyvale, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is directed to a circuit and a method that features selectively isolating a logic device from a source of power implementing a counter circuit to transmit a signal to a voltage control device to isolate a source of power from a logic device, coupled to a plurality of switching elements, with the voltage control device being coupled to allocate power to the logic device in response to activation of one of said plurality of switching elements. The logic device is typically a programmable logic device. In one embodiment, the voltage control device is a field effect transistor. In another embodiment the voltage control device is a voltage regulator.


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