The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7485975 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 03, 2009

Filed:

Aug. 07, 2006
Applicant:

Ryoichi Aoyama, Tokyo, JP;

Inventor:

Ryoichi Aoyama, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
Abstract

The object of the present invention is providing an alignment error measuring mark for an accurate alignment in a metal photolithography process. A substrate reference markis produced by forming a concavity by an erosion caused from a chemical mechanical polishing a tungsten on a surface of a interlayer filmafter holes for substrate reference markis formed on the interlayer filmat a predetermined density and the tungsten is deposited in the holes for substrate reference markand on the interlayer film. A resist reference mark is formed on a resist filmon the substrate reference markand in a shape of a rectangular shape having a different size from the one of the substrate reference mark. Since the substrate reference markis formed by the concavity from the erosion, a position of an edgeof the concavity of a alminum filmcan be aligned to a position of an edgeof the concavity of the substrate reference mark. Consequently, an alignment error can be accurately detected by measuring the position of the edgeand a position of a resist reference mark


Find Patent Forward Citations

Aoyama, Ryoichi. (2009). Alignment error measuring mark and method for manufacturing semiconductor device using the same (U.S. Patent No. 7485975). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7485975

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