The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2009
Filed:
Jan. 16, 2007
Moriyasu Ichino, Yokohama, JP;
Satoshi Yoshikawa, Yokohama, JP;
Moriyasu Ichino, Yokohama, JP;
Satoshi Yoshikawa, Yokohama, JP;
Sumitomo Electric Industries, Ltd., Osaka, JP;
Abstract
The present invention is to prevent a snapping of wiring patterns formed on a flexible printed circuit (FPC) board by bending the FPC board and to make the length of the pattern short to suppress the degradation of high frequency signals transmitted on the wiring pattern. The FPC board provides a via hole in the land region formed on a primary surface of the FPC board and to be attached to the host board. The wiring pattern, which is formed on a secondary surface opposite to the primary surface and is made of copper foil, is drawn from the via hole at the secondary surface. The wiring pattern is covered by a cover layer. Bending the FPC board such that the primary surface is outside, the FPC board is bent at a boundary of the land region at the primary surface, while; the FPC board provides the cover layer on a region of the secondary surface corresponding to the land region, which prevents the wiring pattern on the second region from snapping.