The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2009

Filed:

Jun. 20, 2006
Applicant:

Toshiya Uchida, Kawasaki, JP;

Inventor:

Toshiya Uchida, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory system includes a semiconductor memory having a plurality of banks; and a controller accessing the semiconductor memory. The number of the banks is larger than the number of banks simultaneously accessed. When receiving an access command for the bank currently executing the access operation, the semiconductor memory activates a busy signal and keeps the busy signal active until the access operation currently executed is completed. The controller stops outputting a next access command while receiving the activated busy signal. Based on the received busy signal, the controller judges whether or not the next access command should be outputted to the semiconductor memory. Consequently, it is possible to easily execute the random access in a semiconductor memory having a plurality of banks, without giving any load to the system side, which can improve the data transfer rate at the time of the random access.


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