The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2009
Filed:
Jun. 20, 2006
Hong-kweun Kim, Ansan-si, KR;
Ho-seong Seo, Suwon-si, KR;
Seok-myong Kang, Hwaseong-si, KR;
Youn-kyoung Gil, Hwaseong-si, KR;
Hong-Kweun Kim, Ansan-si, KR;
Ho-Seong Seo, Suwon-si, KR;
Seok-Myong Kang, Hwaseong-si, KR;
Youn-Kyoung Gil, Hwaseong-si, KR;
Samsung Electronics Co., Ltd., Maetan-Dong, Yeongtong-Gu, Suwon-Si, Gyeonggi-Do, KR;
Abstract
Disclosed is a semiconductor package adapted to be light, slim, compact, and suitable for high-density mounting and a method for manufacturing the same. The semiconductor package includes a semiconductor chip; a plurality of active/passive devices; a first PCB acting as a main board, the semiconductor chip and devices selected from the plurality of active/passive devices being mounted on the first PCB, the devices including a highest device; and at least one sub-PCB, remaining devices of the plurality of active/passive devices being mounted on the sub-PCB, the sub-PCB having a through-hole, at least the highest device on the first PCB extending through the through-hole, so that the sub-PCB is connected to the first PCB and positioned in a space above the first PCB while overlapping the first PCB.