The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2009

Filed:

Nov. 29, 2006
Applicants:

Morimasa Miyazaki, Saga, JP;

Takafumi Kitamura, Saga, JP;

Tetsuro Iwashita, Saga, JP;

Mihoko Ohira, Saga, JP;

Inventors:

Morimasa Miyazaki, Saga, JP;

Takafumi Kitamura, Saga, JP;

Tetsuro Iwashita, Saga, JP;

Mihoko Ohira, Saga, JP;

Assignee:

Sumco Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of evaluating the presence or absence and/or degree of metal contamination of a semiconductor substrate including etching the surface of the semiconductor substrate by SC-1 cleaning and/or a HF cleaning, detecting bright points on the surface of the etched substrate with a foreign matter inspection device, and evaluating the presence or absence and/or degree of metal contamination of the semiconductor substrate based on the distribution pattern of bright points detected on the surface of the substrate. Also disclosed is a method of manufacturing a semiconductor substrate comprising mirror polishing a silicon wafer surface, wherein the mirror polishing is conducted using a slurry having a Cu content of approximately equal to or less than 10 ppb, a Ni content of approximately equal to or less than 10 ppb, and an Fe content of approximately equal to or less than 1,000 ppb, and evaluating the semiconductor substrate as above.


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