The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2009
Filed:
Oct. 22, 2007
Applicants:
Yuen H. Chan, Poughkeepsie, NY (US);
William V. Huott, Holmes, NY (US);
Pradip Patel, Poughkeepsie, NY (US);
Daniel Rodko, Wappingers Falls, NY (US);
Inventors:
Yuen H. Chan, Poughkeepsie, NY (US);
William V. Huott, Holmes, NY (US);
Pradip Patel, Poughkeepsie, NY (US);
Daniel Rodko, Wappingers Falls, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract
The output register of an array and the Multiple Input Signature Register (MISR) logic is implemented with one set of L1/L2 master/slave latches and single additional slave latch. This new combined logic uses less critical area on a chip without a performance impact on the array access time or circuit testing.