The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2009
Filed:
Nov. 30, 2004
Yoshito Shimizu, Kanagawa, JP;
Takeaki Watanabe, Kyoto, JP;
Noriaki Saito, Tokyo, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A reception apparatus capable of calibrating a DC offset voltage fast and with high accuracy even in an environment in which interferer exist without causing noise characteristic degradation. In this apparatus, a digital signal processing section () controls the gain of a received signal at such a gain that predetermined reception quality is obtained. A time constant control circuit () controls the time constant and makes the amount of attenuation of the received signal of a low pass filter () more moderate compared to the case where a DC offset voltage is not calibrated during DC offset voltage calibration. A voltage calibration circuit () calibrates the DC offset voltage generated in the received signal when controlling the gain. A second decoder () compares the gain during gain control with a threshold and instructs an operation control circuit () to set a high-frequency circuit () in a non-operating state when the gain during gain control is equal to or above the threshold and set the high-frequency circuit () in an operating state when the gain during gain control is less than the threshold.