The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2009
Filed:
Jan. 17, 2007
Young-yong Byun, Seoul, KR;
Dong-jin Lee, Seoul, KR;
Hi-choon Lee, Yongin-si, KR;
Samsung Electronics Co., Ltd., Suwon-Si, KR;
Abstract
A delay-locked loop (DLL) circuit includes a standby signal generating circuit, a front stage circuit, and a back stage circuit. The standby signal generating circuit generates a first standby signal and a second standby signal in response to an active signal, a crock enable signal, a first column address strobe (CAS) latency signal, and a second CAS latency signal. The front stage circuit compares the phase of an external clock signal and the phase of a feedback signal and delays the external clock signal based on the phase difference between the external clock signal and the feedback signal to generate a first clock signal. The back stage circuit executes interpolation and duty-cycle correction on the first clock signal.