The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7476617 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 13, 2009

Filed:

Feb. 24, 2006
Applicants:

Moon-keun Lee, Ichon-shi, KR;

Tae-kwon Lee, Ichon-shi, KR;

Jun-mo Yang, Ichon-shi, KR;

Tae-su Park, Ichon-shi, KR;

Yoon-jik Lee, Ichon-shi, KR;

Inventors:

Moon-Keun Lee, Ichon-shi, KR;

Tae-Kwon Lee, Ichon-shi, KR;

Jun-Mo Yang, Ichon-shi, KR;

Tae-Su Park, Ichon-shi, KR;

Yoon-Jik Lee, Ichon-shi, KR;

Assignee:

Hynix Semiconductor Inc., Kyoungki-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.


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