The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2009

Filed:

Feb. 11, 2005
Applicants:

Joong-hyun Baek, Gyeonggi-do, KR;

Sang-wook Park, Gyeonggi-do, KR;

Hae-hyung Lee, Gyeonggi-do, KR;

Inventors:

Joong-Hyun Baek, Gyeonggi-do, KR;

Sang-Wook Park, Gyeonggi-do, KR;

Hae-Hyung Lee, Gyeonggi-do, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor stack package includes lower and upper individual packages. When the upper individual package is stacked on the lower individual package, a heat-conducting layer provided under the upper package touches a heat-mediating layer provided on the lower package. Thus, a layer of trapped air found in conventional stack packages is eliminated, and a direct heat-dissipating path is produced through both the heat-conducting layer and the heat-mediating layer. Therefore, the heat dissipation of the stack package is improved. Alternatively, the stack package may have a symmetric configuration in which each IC chip faces away from each other. A memory module has several stack packages mounted on one or both surfaces of a module board. The method includes forming the packages and stacking the packages. The method further includes forming a module board and mounting the stack packages on the module board.


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