The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2008

Filed:

Jul. 26, 2006
Applicants:

Gregory Costrini, Hopewell Junction, NY (US);

David M. Fried, Brewster, NY (US);

Inventors:

Gregory Costrini, Hopewell Junction, NY (US);

David M. Fried, Brewster, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are embodiments of a semiconductor structure with a partially self-aligned contact in lower portion of the contact being enlarged to reduce resistance without impacting device yield. The semiconductor structure includes a substrate; at least two gate electrodes on the substrate; sidewall spacers adjacent to each of the gate electrodes; a silicide region on the substrate between the gate electrodes; and a contact on the silicide region, wherein the contact includes a self-aligned lower portion on the silicide region, which extends between the sidewall spacers and follows contours of the sidewall spacers, and an upper portion, and wherein the self-aligned lower portion includes a bottom surface adjacent to the silicide region and a top surface adjacent to the upper portion, with the upper portion being narrower than the top surface. Additionally, the structure optionally incorporates a thick middle-of-the-line (MOL) nitride stress film to enhance carrier mobility.


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