The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2008
Filed:
Nov. 07, 2006
Hyuk Lim, Seoul, KR;
Takashi Noguchi, Yongin-si, KR;
Jong-man Kim, Suwon-si, KR;
Kyung-bae Park, Seoul, KR;
Huaxiang Yin, Yongin-si, KR;
Hyuk Lim, Seoul, KR;
Takashi Noguchi, Yongin-si, KR;
Jong-man Kim, Suwon-si, KR;
Kyung-bae Park, Seoul, KR;
Huaxiang Yin, Yongin-si, KR;
Abstract
A thin film transistor having an offset or a lightly doped drain (LDD) structure by self alignment and a method of fabricating the same comprises a substrate, a silicon layer disposed on the substrate and including a channel region, a source region and a drain region at both sides of the channel region, and offset regions, each offset regions disposed between the channel region and one of the source and drain regions at both sides of the channel region, a gate insulating layer covering the channel region and the offset regions disposed at both sides of the channel region excluding the source and drain regions, and a gate layer formed on the channel region excluding the offset regions. The thin film transistor has the structure in which an offset or LDD is obtained without an additional mask process.