The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7468900 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 23, 2008

Filed:

Feb. 17, 2006
Applicants:

Kunisato Yamaoka, Osaka, JP;

Hiroshige Hirano, Nara, JP;

Masahiko Sakagami, Kyoto, JP;

Inventors:

Kunisato Yamaoka, Osaka, JP;

Hiroshige Hirano, Nara, JP;

Masahiko Sakagami, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

In order to omit a reset transistor between a storage node and a cell plate line of a memory cell, a cell plate line is fixed to a potential substantially equal to a ground potential and a bit line is driven with positive and negative voltages.


Find Patent Forward Citations

Yamaoka, Kunisato. (2008). Semiconductor memory device having a bitline amplified to a positive voltage and a negative voltage (U.S. Patent No. 7468900). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7468900

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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