The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2008
Filed:
Apr. 30, 2004
Kenneth K. O, Gainesville, FL (US);
Jesal Mehta, Greensboro, NC (US);
Kenneth K. O, Gainesville, FL (US);
Jesal Mehta, Greensboro, NC (US);
University of Florida Research Foundation, Inc., Gainesville, FL (US);
Abstract
An integrated circuit layout and architecture for reduced noise coupling between circuitry and on-chip antenna for wireless communications includes a monolithic semiconducting substrate having a plurality of integrated devices including a transmitter and/or a receiver. At least one on-chip balanced antenna is formed in or on the substrate. A balanced antenna feed structure electrically connects the antenna to the transmitter or receiver. At least one integrated device is substantially symmetrically disposed on the substrate relative to the on-chip antenna(s). The device(s) selected for substantially symmetrically placement are preferably those which generate the largest noise coupling.