The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7466656 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 16, 2008

Filed:

Oct. 26, 2004
Applicants:

Parijat Dube, Hicksville, NY (US);

Zhen Liu, Tarrytown, NY (US);

Dimitrios Pendarakis, Westport, CT (US);

George V. Popescu, Westport, CT (US);

Inventors:

Parijat Dube, Hicksville, NY (US);

Zhen Liu, Tarrytown, NY (US);

Dimitrios Pendarakis, Westport, CT (US);

George V. Popescu, Westport, CT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods, apparatuses and program storage devices for constructing a network overlay via embedding an interconnection network in a network overlay graph are provided herein. The network delay distances between pairs of overlay nodes are measured on the shortest network paths. The mapping of the interconnection topology to the network overlay nodes preferably involves assigning 2m-length binary indexes to the network overlay nodes. There is proposed herein a polynomial time algorithm for interconnection topology embedding using iterative cluster division and node binary index assignment. There is further proposed herein a method for construction of network overlays through interconnection network topology embedding, with the objective of optimizing a quality of service metric (e.g. minimization of the average network overlay routing delay).


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