The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2008
Filed:
Sep. 08, 2006
Applicants:
Jiun-in Guo, Chia-Yi, TW;
Chih-ta Chien, Chia-Yi, TW;
Chia-jui Huang, Chia-Yi, TW;
Inventors:
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method for memory controlling is disclosed. It includes an embedded address generator and a controlling scheme of burst terminates burst, which could erase the latency caused by bus interface during the access of non-continuous addresses. Moreover, it includes a controlling scheme of anticipative row activating, which could reduce the latency across different rows of memory by data access. The method could improve the access efficiency and power consumption of memory.
Guo, Jiun-In. (2008). Memory controlling method (U.S. Patent No. 7464230). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7464230
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile