The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2008

Filed:

May. 17, 2005
Applicants:

Aleksandr Kaplun, Whitsett, NC (US);

Huajun J. Wen, Austin, TX (US);

Inventors:

Aleksandr Kaplun, Whitsett, NC (US);

Huajun J. Wen, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A more efficient method of counting the number of zeros in a 4-bit value generates three output bits (q, qand q) from four input bits (a, a, aand a) according to the logic equations qnot(aaaa), qnot(aa), qa(not a)+not(aa). These output bits yield the number of non-significant (leading or trailing) zeros in the 4-bit value. The invention may be implemented in a 16-bit zero counter having four 4-bit decoders, but is applicable to any number of zero counters. The output bits from the four 4-bit decoders can be combined to yield a 5-bit count whose most significant bit is a one when all input bits from all four of the 4-bit blocks are zero. A multiplexer stage derives two outputs based on a portion of the decode bits. For wider counters, the output stage uses four AOI21 gates to merge additional decode bits from a next lower 16-bit zero counter.


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