The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2008

Filed:

Dec. 24, 2003
Applicant:

Fabio Pisoni, Busto Garolfo, IT;

Inventor:

Fabio Pisoni, Busto Garolfo, IT;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/38 (2006.01); H04L 5/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock offset compensation arrangement may include a fractional interpolator for applying a trigonometric interpolation to a sampled input signal according to a clock offset signal. It uses transform-based processing in the frequency domain. Compared to a polynomial type interpolation it may be easier to implement, and may achieve a closer approximation to an ideal interpolation. It may reduce the effects of non-linear type errors introduced by truncation of higher powers. The arrangement may be applied to receivers or transmitters of multi-carrier modems, as well as other applications which use rate adaptation or synchronization.


Find Patent Forward Citations

Pisoni, Fabio. (2008). Electronic circuit for performing fractional time domain interpolation and related devices and methods (U.S. Patent No. 7460587). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7460587

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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