The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 02, 2008
Filed:
Jun. 19, 2006
Corey Kenneth Barrows, Colchester, VT (US);
Douglas W. Kemerer, Essex Junction, VT (US);
Stephen Gerard Shuma, Underhill, VT (US);
Douglas Willard Stout, Milton, VT (US);
Oscar Conrad Strohacker, Leander, TX (US);
Mark Steven Styduhar, Hinesburg, VT (US);
Paul Steven Zuchowski, Jericho, VT (US);
Corey Kenneth Barrows, Colchester, VT (US);
Douglas W. Kemerer, Essex Junction, VT (US);
Stephen Gerard Shuma, Underhill, VT (US);
Douglas Willard Stout, Milton, VT (US);
Oscar Conrad Strohacker, Leander, TX (US);
Mark Steven Styduhar, Hinesburg, VT (US);
Paul Steven Zuchowski, Jericho, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A circuit and a method for adjusting the performance of an integrated circuit, the circuit includes: first and second sets of FETs having respective first and second threshold voltages, the first threshold voltage different from the second threshold voltage; a first monitor circuit containing at least one FET of the first set of FETs and a second monitor circuit containing at least one FET of the second set of FETs; a compare circuit adapted to generate a compare signal based on a performance measurement of the first monitor circuit and a performance measurement of the second monitor circuit; and a control unit adapted to generate a control signal to a voltage regulator based on the compare signal, the voltage regulator adapted to supply a bias voltage to wells of FETs of the second set of FETs, the value of the bias voltage based on the control signal.