The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2008

Filed:

Jul. 11, 2005
Applicants:

Sang-hoon Lee, Gyeonggi, KR;

Hun-hyeoung Leam, Gyeonggi-do, KR;

Jai-dong Lee, Gyeonggi-do, KR;

Jung-hwan Kim, Gyeonggi-do, KR;

Young-sub You, Gyeonggi-do, KR;

Ki-su NA, Gyeonggi-do, KR;

Woong Lee, Seoul, KR;

Yong-sun Lee, Seoul, KR;

Won-jun Jang, Seoul, KR;

Inventors:

Sang-Hoon Lee, Gyeonggi, KR;

Hun-Hyeoung Leam, Gyeonggi-do, KR;

Jai-Dong Lee, Gyeonggi-do, KR;

Jung-Hwan Kim, Gyeonggi-do, KR;

Young-Sub You, Gyeonggi-do, KR;

Ki-Su Na, Gyeonggi-do, KR;

Woong Lee, Seoul, KR;

Yong-Sun Lee, Seoul, KR;

Won-Jun Jang, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a floating gate of a non-volatile memory device can include etching a mask pattern formed between field isolation regions in a field isolation pattern on a substrate to recess a surface of the mask pattern below an upper surface of adjacent field isolation regions to form an opening having a width defined by a side wall of the adjacent field isolation regions above the surface. Then the adjacent field isolation regions is etched to increase the width of the opening.


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