The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2008

Filed:

Jul. 03, 2006
Applicants:

Jaroslaw A. Magera, Palatine, IL (US);

Gregory J. Dunn, Arlington Heights, IL (US);

Inventors:

Jaroslaw A. Magera, Palatine, IL (US);

Gregory J. Dunn, Arlington Heights, IL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
B32B 15/00 (2006.01); H05K 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A sequentially laminated printed circuit board having highly reliable vias can be fabricated by pattern plating flanges or via lands on a copper foil, laminating the foil to a prepreg so that the flanges are embedded into the surface of the prepreg, creating via holes in the laminate that are substantially concentric with the individual flanges, plating the via holes with copper, chemically or mechanically milling off a portion of the copper plating and optionally some of the copper foil to reduce the overall thickness of the laminate, and laminating a second and optionally a third prepreg to the laminate. The resulting printed circuit board has the flanges embedded in the surface of the laminate so that the inside wall of the flange is electrically and mechanically attached to the outside wall of the plated through hole barrel.


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