The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 2008
Filed:
Sep. 21, 2006
Applicant:
Alex Shubat, Fremont, CA (US);
Inventor:
Alex Shubat, Fremont, CA (US);
Assignee:
Virage Logic Corp., Fremont, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/22 (2006.01); G11C 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract
A system and method for effectuating a self-timed clock (STC) loop for memory access operations. In one embodiment, the method includes configuring a particular access margin value setting based on configuration data of at least one memory instance of a memory device; and applying the particular access margin value setting to a reference cell assembly associated with the at least one memory instance for facilitating generation of a self-timed clock signal that is optimized for the at least one memory instance.