The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2008

Filed:

Sep. 17, 2003
Applicants:

Carlos Antonio Alba Pinto, Eindhoven, NL;

Ramanathan Sethuraman, Eindhoven, NL;

Balakrishnan Srinivasan, Eindhoven, NL;

Harm Johannes Antonius Maria Peters, Eindhoven, NL;

Rafael Peset Llopis, Eindhoven, NL;

Inventors:

Carlos Antonio Alba Pinto, Eindhoven, NL;

Ramanathan Sethuraman, Eindhoven, NL;

Balakrishnan Srinivasan, Eindhoven, NL;

Harm Johannes Antonius Maria Peters, Eindhoven, NL;

Rafael Peset Llopis, Eindhoven, NL;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A data processing apparatus has an instruction memory system arranged to output an instruction word, capable of containing a plurality of instructions, respective instruction words being output in response to respective instruction addresses. An instruction execution unit contains a plurality of functional units, each capable of executing a respective instruction from the instruction word in parallel with execution of other instructions from the instruction word by other ones of the functional units. A power saving circuit is provided to switch a selectable subset of the functional units and/or parts of the instruction memory to a power saving state, while other functional units and parts of the instruction memory continue processing instructions in a normal power consuming state. The power saving circuit selects the functional units and/or parts of the instruction memory dependent on program execution.


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