The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 2008
Filed:
May. 01, 2006
Arun Rao, Rocklin, CA (US);
John Philip Parry, Grass Valley, CA (US);
William J. Mcintyre, Wheatland, CA (US);
Nathanael Griesert, Grass Valley, CA (US);
Arun Rao, Rocklin, CA (US);
John Philip Parry, Grass Valley, CA (US);
William J. McIntyre, Wheatland, CA (US);
Nathanael Griesert, Grass Valley, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A switch array circuit that enables voltage regulation by bucking a relatively larger input voltage as it declines over time with different fractional gains that are based on different gain phase arrangements for a plurality of capacitors. A common rest phase is provided during the switching between the different gain phases. The rest phase inherently enables power to be conserved during gain transitions. Increasingly larger fractional gain phases (less buck) is provided as the input voltage declines over time, e.g., from ⅓ to ⅖ to ½ to ⅔ to unity, and the like. Also, the common rest phase for the plurality of capacitors is arranged to minimize fluctuation of the output voltage during switching between phases to generate a selected gain from the gain phase. Additionally, the common rest phase conserves/stores energy during switching transitions between multiple gain phases. The stored energy in the common rest phase can be subsequently reused in the gain phases.