The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2008

Filed:

Oct. 19, 2007
Applicants:

Yoshinori Nakanishi, Neyagawa, JP;

Mamoru Sekiya, Neyagawa, JP;

Inventors:

Yoshinori Nakanishi, Neyagawa, JP;

Mamoru Sekiya, Neyagawa, JP;

Assignee:

Onkyo Corporation, Neyagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01);
U.S. Cl.
CPC ...
Abstract

A pulse width modulation circuitof the present invention changes the voltage of a first integration circuit Cduring the first period Tof the clock signal MCLK based on a current based on an audio signal eS, changes the voltage of the first integration circuit Cbased on a constant bias current in the opposite direction while changing the voltage of a second integration circuit Cduring the second period T, and changes the voltage of the second integration circuit Cbased on the bias current during the third period T. The amount of time from the start of the second period Tuntil the voltage of the first integration circuit Creaches the reference voltage Vth is detected, and the amount of time from the start of the third period Tuntil the voltage of the second integration circuit Creaches the reference voltage Vth is detected. The voltage of the first integration circuit Cis kept at the reference voltage Vth from when the voltage of the first integration circuit Creaches the reference voltage Vth until the start of the third period T, and the voltage of the second integration circuit Cis kept at the reference voltage Vth from when the voltage of the second integration circuit Creaches the reference voltage Vth until the start of the fourth period T. A pulse signal is generated, in which the pulse widths are equal to the amounts of time required for first and second integration circuits Cand Cto reach the reference voltage Vth.


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