The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2008

Filed:

Apr. 14, 2004
Applicants:

Takashi Kurihara, Kasugai, JP;

Kazutaka Takeuchi, Kasugai, JP;

Inventors:

Takashi Kurihara, Kasugai, JP;

Kazutaka Takeuchi, Kasugai, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for accurately determining the provisional quantity and provisional locations of power supply pads prior to detailed layout of a semiconductor integrated circuit. The method decreases redesigning, shortens the design time, and lowers design costs. The method includes performing a power supply network analysis of the core section to obtain voltage values of the nodes, calculating current values between the nodes from the voltage values of the nodes and the resistances between the nodes, and calculating current values of the power supply pads from the current values between the nodes. The method further includes determining whether to eliminate or add a power supply pad depending on whether the current value of each power supply pad exceeds the current capacity of an associated IO buffer.


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