The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2008

Filed:

Jul. 28, 2005
Applicants:

Varadarajan Devnath, Santa Clara, CA (US);

Vijaya Ceekala, San Jose, CA (US);

James B. Wieser, Pleasanton, CA (US);

Lawrence K. Whitcomb, San Jose, CA (US);

Inventors:

Varadarajan Devnath, Santa Clara, CA (US);

Vijaya Ceekala, San Jose, CA (US);

James B. Wieser, Pleasanton, CA (US);

Lawrence K. Whitcomb, San Jose, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G01R 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A skew measurement system and method wherein each of the signals among which the skew is to be determined is connected one at a time to a clock recovery loop. The locked state of the clock recovery loop is used as an indicator of the skew of the data signal relative to the internal clock of the clock recovery loop. By measuring the difference between the locked state of different signals, their relative skew can be measured.


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