Voltage level shifting circuit, a differential input stage circuit, and a method for providing a level shifted differential signal to a differential input buffer circuit

Abstract

A voltage level shifting circuit () for shifting the common mode voltage of a differential signal to be within the working range of a differential input buffer circuit () comprises a first resistive voltage divider circuit () coupled between a first input terminal () and a voltage reference terminal () for receiving a voltage reference to which the common mode voltage of the level shifted differential signal is to be referenced, and a second resistive voltage divider circuit () coupled between a second input terminal () and the voltage reference terminal (). The differential signal is applied to the first and second terminals (), and the level shifted differential signal is produced on first and second output taps () of the first and second resistive voltage divider circuits () with the common mode of the level shifted differential signal referenced to the voltage reference applied to the voltage reference terminal (). First and second high frequency low impedance circuits () couple the first and second input terminals () to the first and second output taps () to provide respective direct current blocked high frequency low impedance paths for the differential signal to first and second differential inputs () of the differential input buffer circuit () for minimizing propagation delays resulting from low pass filters created by the interaction of the first and second resistive voltage divider circuits () with first and second intrinsic input capacitance (C,C) coupling the first and second differential inputs () of the differential input buffer circuit () to ground.