The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2008
Filed:
Dec. 22, 2006
Steven Lee Kiel, Littleton, CO (US);
Douglas Norman Krening, Larkspur, CO (US);
Lark Edward Lehman, Colorado Springs, CO (US);
Michael Joseph Schneiderwind, Castle Rock, CO (US);
Steven Lee Kiel, Littleton, CO (US);
Douglas Norman Krening, Larkspur, CO (US);
Lark Edward Lehman, Colorado Springs, CO (US);
Michael Joseph Schneiderwind, Castle Rock, CO (US);
Chaologix, Inc., Gainesville, FL (US);
Abstract
A dynamically configurable logic gate includes an input summer for receiving a first input signal and a second input signal to generate a summed input signal. Further the dynamically configurable logic gate includes a nonlinear element that applies a nonlinear function to the summed input signal to produce a nonlinear output signal. The dynamically configurable logic gate output signal corresponds to one of a plurality of different logic gates responsive to adjusting the summed input signal and/or the nonlinear function. In another embodiment, the dynamically configurable logic gate includes feedback to one of the inputs. The dynamically configurable logic gate receives the two inputs and operates as one of a plurality of different logic gate types so as to produce an output signal that corresponds to a memory latch according to a selection of the control signal. An array structure of dynamically configurable logic elements is also disclosed.