The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2008
Filed:
Jun. 22, 2005
Gordon S. W. Craig, Palo Alto, CA (US);
Ali A. Tootoonchi, San Jose, CA (US);
Scott Herrmann, Hollister, CA (US);
Glenn Gengel, Hollister, CA (US);
Randy Eisenhardt, Fargo, ND (US);
Gordon S. W. Craig, Palo Alto, CA (US);
Ali A. Tootoonchi, San Jose, CA (US);
Scott Herrmann, Hollister, CA (US);
Glenn Gengel, Hollister, CA (US);
Randy Eisenhardt, Fargo, ND (US);
Alien Technology Corporation, Morgan Hill, CA (US);
Abstract
Methods and apparatuses for an electronic assembly. The method comprises depositing a functional block into a recessed region, forming dielectric layer selectively over at least one of a selected portion of the functional block and a selected portion of the first substrate; and forming one or more electrical interconnections to the functional block. The recessed region is formed on a first substrate. The depositing of the functional block occurs on a continuous web line and using a Fluidic Self Assembly process. The functional block has a width-depth aspect ratio that substantially matches a width-depth aspect ratio of said recessed region which is one of equal to or less than 10.5:1, and equal to or less than 7.5:1.