The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2008
Filed:
May. 25, 2006
Jin-goo Lee, Pyeongtaek-si, KR;
Jin-Goo Lee, Pyeongtaek-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A load-lock and semiconductor device manufacturing equipment have a wafer anti-contamination measure capable of maximizing production yield. The load-lock includes a chamber that can be hermetically sealed, a slit valve disposed at the front of the chamber for placing the chamber in communication with another chamber, a door disposed at the back of the chamber so as to allow a wafer cassette to be introduced into the chamber. In addition to having at least one of the load-locks, the semiconductor manufacturing equipment includes a transfer chamber to which the load-lock is connected, at least one process chamber connected to the transfer chamber, and an exhaust system by which each load-lock chamber is evacuated. The wafer anti-contamination measure may be an anti-eddy cover that covers the open back of a wafer cassette when the cassette is supported in the load-lock chamber. Alternatively, the wafer anti-contamination measure may be ductwork of the exhaust system that extends vertically along the door and/or rear wall of the load-lock chamber.