The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2008
Filed:
Aug. 08, 2006
Victor Z. Slonim, Broomfield, CO (US);
Parivallal Kannan, Longmont, CO (US);
Salim Abid, Lafayette, CO (US);
Victor Z. Slonim, Broomfield, CO (US);
Parivallal Kannan, Longmont, CO (US);
Salim Abid, Lafayette, CO (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method of assigning I/O objects to banks of a target device can include concurrently assigning I/O objects, including select I/O objects and clock I/O objects, of the circuit design to I/O groups according to an I/O standard associated with each I/O object. Each I/O group can include only I/O objects of a same I/O standard. The method also can include establishing a plurality of linear constraints for regulating assignment of the I/O groups to banks of the target device. The linear constraints can include range constraints indicating I/O banks capable of hosting clock I/O objects. The method also can include defining mutual relationships among selected ones of the linear constraints. An indication as to whether a feasible solution exists for assignment of the I/O groups to banks of the target device can be provided by minimizing a linear objective function while observing the linear constraints and the mutual relationships.