The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2008

Filed:

Jul. 19, 2007
Applicants:

Kevin C. Gower, LaGrangeville, NY (US);

Mark W. Kellogg, Henrietta, NY (US);

Warren E. Maule, Cedar Park, TX (US);

Thomas B. Smith, Iii, Wilton, CT (US);

Robert B. Tremaine, Stormville, NY (US);

Inventors:

Kevin C. Gower, LaGrangeville, NY (US);

Mark W. Kellogg, Henrietta, NY (US);

Warren E. Maule, Cedar Park, TX (US);

Thomas B. Smith, III, Wilton, CT (US);

Robert B. Tremaine, Stormville, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A cascaded interconnect system including a memory controller, one or more memory modules, an upstream memory bus and a downstream memory bus. The one or more memory modules include a first memory module with cache data. The memory modules and the memory controller are interconnected by a packetized multi-transfer interface via the downstream memory bus and the upstream memory bus. The first memory module and the memory controller are in direct communication via the upstream memory bus and the downstream memory bus.


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