The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2008
Filed:
Dec. 19, 2006
Sang-kwon Lee, Gyeonggi-do, KR;
Sang-Kwon Lee, Gyeonggi-do, KR;
Hynix Semiconductor Inc., Gyeonggi-do, KR;
Abstract
An address buffer in a semiconductor memory apparatus includes: an address input unit that generates a first latch input address from a buffering enable signal and an input address. A clock synchronizing unit generates a second latch input address from the first latch input address and a clock. A synchronous address latch unit generates a synchronous output address from a command pulse signal and the second latch input address. A synchronous mode detecting unit determines whether a mode is a synchronous mode or not from a valid address signal and the clock to generate a synchronous mode signal. An asynchronous address latch unit generates an asynchronous output address from the synchronous mode signal, an address strobing signal, and the second latch input address.