The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2008
Filed:
Jan. 22, 2003
Michitaka Kameyama, Sendai, JP;
Takahiro Hanyu, Sendai, JP;
Hiromitsu Kimura, Ukyo-ku, JP;
Yoshikazu Fujimori, Ukyo-ku, JP;
Takashi Nakamura, Ukyo-ku, JP;
Hidemi Takasu, Ukyo-ku, JP;
Michitaka Kameyama, Sendai, JP;
Takahiro Hanyu, Sendai, JP;
Hiromitsu Kimura, Ukyo-ku, JP;
Yoshikazu Fujimori, Ukyo-ku, JP;
Takashi Nakamura, Ukyo-ku, JP;
Hidemi Takasu, Ukyo-ku, JP;
Rohm Co., Ltd., Kyoto, JP;
Abstract
To provide a logical operation circuit which can perform a logical operation using a ferroelectric capacitor and a logical operation method. A logical operation circuithas a ferroelectric capacitors CF and a transistor MP. The ferroelectric capacitor CF can retain a polarization state P(y=1) or P(y=0) corresponding to first operation target data y. In an operation process, a first terminalof the ferroelectric capacitoris precharged to a source potential Vdd, and a potential corresponding to second operation target data x, that is, a ground potential GND (x=1) or the source potential Vdd (x=0), is given to a second terminalof the ferroelectric capacitor via a bit line BL. When the threshold voltage Vth of the transistor MP is set properly, the transistor MP becomes on or off (on, on, on, off) depending on the combination of x and y (0-0, 0-1, 1-0, 1-1).