The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2008

Filed:

Oct. 24, 2007
Applicants:

Yil Wook Kim, Seoul, KR;

Jun Hee Cho, Seoul, KR;

Sung Eon Park, Seoul, KR;

Jin Hong Ahn, Kyoungki-do, KR;

Sang Don Lee, Kyoungki-do, KR;

Inventors:

Yil Wook Kim, Seoul, KR;

Jun Hee Cho, Seoul, KR;

Sung Eon Park, Seoul, KR;

Jin Hong Ahn, Kyoungki-do, KR;

Sang Don Lee, Kyoungki-do, KR;

Assignee:

Hynix Semiconductor Inc., Kyoungki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device has a silicon substrate, in which an active region is formed between two device isolation films and a gate is formed on the surface of the active region. The silicon substrate has a laterally etched portion in the active region below the surface of the active region on the side near the device isolation film. An insulating film is formed on the laterally etched portion of the silicon substrate. A conductive electrode is formed on the insulating film, through which an external voltage is applied to adjust a threshold voltage. The device isolation film is formed on the conductive electrode. None or some pockets of vacant cavity is present between the device isolation film and the conductive electrode.


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